1. Technical Field
The present invention relates to a gate drive device which drives the gate of an active element with a large input capacity, such as an insulated gate bipolar transistor (IGBT) or power metal oxide semiconductor field effect transistor (MOSFET).
2. Related Art
As this kind of gate drive device, there is known a gate drive circuit which drives the gate of an IGBT (for example, refer to JP-A-2000-59195).
This gate drive circuit has a configuration wherein a P-type MOSFET, a supersaturation reactor, a diode, and an N-type MOSFET are connected in series between a voltage source and a ground. Then, a connection point between the P-type MOSFET and supersaturation reactor is connected via a gate protection resistor to the gate of the IGBT. Also, a capacitor charged by the voltage source is connected in parallel with the series circuit of the P-type MOSFET, supersaturation reactor, diode, and N-type MOSFET. A power source voltage applied to the series circuit of the P-type MOSFET, supersaturation reactor, diode, and N-type MOSFET is stabilized by the capacitor.
Also, in the event that a high, abnormal current higher than the normal current flows through an active element such as an IGBT or MOSFET, the voltage between the gate and emitter of the active element rises, due to which a collector current increases, and the reliability of the active element decreases. In order to prevent the decrease in reliability, there is known a device which protects the element when there is an abnormal current by clamping a gate voltage applied to the gate of the active element at or below an absolute maximum rated value (for example, refer to JP-A-2-7714).
Generally, as a gate drive device in a case of making the load an inductor L, and applying an active element such as an IGBT which has a current sensing function, a control IC 4 configured of a semiconductor integrated circuit is applied, as shown in FIG. 6.
In this case, an inductor L, acting as the load, and an IGBT 3 are connected in series between a power source line 1, to which a power source voltage Vbatt of a battery acting as an external power source is applied, and a ground line 2 connected to a ground gnd.
A series circuit of a current limiting resistor RB and the control IC 4 acting as a gate drive device is connected in parallel with the inductor L and IGBT 3. A current sensing voltage Vsns (see FIG. 7) output from a current sensing terminal S of the IGBT 3 is input into the control IC 4. Also, a gate signal output from the control IC 4 is supplied to the gate of the IGBT 3.
Furthermore, a noise removing capacitor C1, which removes high frequency noise from the inductor L, is connected in parallel with the current limiting resistor RB and control IC 4. Also, a bypass capacitor C2, corresponding to the capacitor in JP-A-2000-59195, is connected in parallel with the control IC 4 on its power source line 1 side and ground line 2 side. L1 and L2 are line inductors of the power source line 1 and ground line 2 respectively.
A specific configuration of the control IC 4 is such that, as shown in FIG. 7, a series circuit of a constant current source 13, a P-type MOSFET 14, and an N-type MOSFET 15 is connected between an internal power source line 11, to which an internal power source voltage Vdc is applied, and a ground line 12 connected to the ground gnd. A current controlling P-type MOSFET 16 is connected in parallel with the N-type MOSFET 15. Herein, switch signals SWp and SWn (not labeled) synchronized with a control input Sin input into an input terminal tin (see FIG. 6) of the control IC 4 are supplied to the gates of the P-type MOSFET 14 and N-type MOSFET 15. Also, an output signal of an operational amplifier 17, into whose non-inverting input side a reference voltage Vref is input and into whose inverting input side the current sensing voltage Vsns is input, is input into the P-type MOSFET 16. A gate voltage Vg (not labeled) is controlled by the operational amplifier 17 in such a way that the current sensing voltage Vsns, wherein a sensing current input from the current sensing terminal S of the IGBT is converted into a voltage by a sensing resistor, becomes equivalent to the reference voltage Vref.
In FIG. 6, the bypass capacitor C2 is connected in parallel between point C of the power source line side and point B of the ground line 12 side of the control IC 4. For this reason, even in the event that the battery voltage Vbatt fluctuates, as shown in (a) of FIG. 8, it is possible to prevent a steep change occurring in a current Ic flowing through the IGBT 3, as shown in (g) of FIG. 8.
That is, on the battery voltage Vbatt fluctuating like a battery ripple, a voltage Vab between connection points A and B of the power source line 1 and ground line 2 of the series circuit of the current limiting resistor RB and control IC 4 fluctuates, as shown in (b) of FIG. 8. That is, a momentary voltage drop occurs at a falling point of the battery voltage Vbatt due to a resonance circuit configured of the line inductors L1 and L2, and the capacitor C1. Then, the momentary voltage drop gradually becomes larger along with an increase in the collector current Ic, and momentarily falls below a minimal operating power source voltage of the control IC 4.
However, as the bypass capacitor C2 is connected in parallel with the control IC 4, a low pass filter (LPF) is configured by the bypass capacitor C2 and the current limiting resistor RB. Due to the effect of the low pass filter, a voltage Vcb between a connection point C of the bypass capacitor C2 and the connection point B alternates between a gentle decrease and increase, as shown in (c) of FIG. 8. For this reason, the internal power source voltage Vdc of the control IC is maintained at an approximately constant voltage sufficiently higher than the minimal operating power source voltage of the control IC 4, as shown in (e) of FIG. 8.
A control input signal Sin input into an input terminal tin of the control IC 4 inverts from a logical value “0” to a logical value “1” at a point t1, and inverts from the logical value “1” to the logical value “0” at a point t3, as shown in (d) of FIG. 8. In this case, the gate voltage Vg output from the control IC 4 reaches a comparatively high level in response to a rise of the control input signal Sin, after which it gradually decreases, becoming a constant voltage from a point t2, as shown in (f) of FIG. 8.
For this reason, as shown in (g) of FIG. 8, the current Ic flowing through the IGBT 3 starts increasing from zero at the point t1, gradually increasing until the vicinity of the point t2, after which a peak value alternates between a gentle decrease and increase, and it returns to zero at the point t3.
Consequently, it is possible to prevent a steep fluctuation occurring in the current flowing through the IGBT 3 due to the effect of the voltage fluctuation of the battery power source voltage Vbatt.
However, when omitting the bypass capacitor C2 with the object of reducing the number of parts, it becomes impossible to utilize the effect of the low pass filter. For this reason, the voltage Vcb between the connection points C and B of the control IC 4 takes on the same waveform as the voltage Vab between the connection points A and B, as shown in (c) of FIG. 9. Consequently, a momentary, large voltage drop occurs in the internal power source voltage Vdc, as shown in (e) of FIG. 9, and a momentary, large voltage drop also occurs in the gate voltage Vg, as shown in (f) of FIG. 9. In response to this, a steep change is caused in the current Ic flowing through the IGBT 3, as shown in (g) of FIG. 9, and an induced voltage proportional to the current change is generated at the inductor L acting as the load.
One of the reasons causing the momentary, large voltage drop in the gate voltage Vg is that the relationship between the internal power source voltage Vdc of the control IC 4 and the gate voltage Vg temporarily becomes such that Vdc is less than Vg, and a gate charge accumulated at the gate of the IGBT 3 flows out to the internal power source voltage Vdc side through a body diode D1 as a parasitic diode of the P-type MOSFET 14.
Another reason is that, in the event of a steep voltage drop during a current limiting control, a gate charge accumulated at the gate of the IGBT 3 flows out to the ground line 12 through the P-type MOSFET 16.
In the face of this kind of steep voltage drop, it is not possible either to obtain a sufficient advantage from the method described in JP-A-2-7714, whereby the voltage between the gate and emitter of the IGBT is clamped.